OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 529

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
529 or_debug_proxy updates julius 4778d 07h /openrisc/trunk/
528 ORPSoC SPI flash programming link script bug fix julius 4779d 17h /openrisc/trunk/
527 newlib-1.18.0 port update, name of support library header now or1k-support.h julius 4780d 07h /openrisc/trunk/
526 uC/OS-II port fix for user interrupt handler julius 4780d 14h /openrisc/trunk/
525 uC/OS-II port fix: account for redzone during task stack initialisation julius 4780d 15h /openrisc/trunk/
524 Various tidy ups to GDB and updates to the simulation boards for the latest GCC. jeremybennett 4785d 10h /openrisc/trunk/
523 Changes to -mnewlib is no longer needed with the or32-elf tool chain. jeremybennett 4786d 13h /openrisc/trunk/
522 Miscellaneous tidy ups. jeremybennett 4787d 17h /openrisc/trunk/
518 Missing parts of checkin from revision 515. Version now 1.0rc4. julius 4790d 10h /openrisc/trunk/
517 newlib updates with or1k support functions, libgloss cleanup julius 4791d 04h /openrisc/trunk/
515 Minor synch with recent changes by Joern. jeremybennett 4791d 11h /openrisc/trunk/
514 Changes for version 1.0rc3 for OpenRISC 1000. Various bugs and tests fixed. jeremybennett 4791d 14h /openrisc/trunk/
512 Updates for release 1.0rc3 for the OpenRISC 1000. jeremybennett 4791d 17h /openrisc/trunk/
510 Updates for release 0.5.1rc1. jeremybennett 4792d 16h /openrisc/trunk/
508 Updates for Or1ksim 0.5.0rc3. jeremybennett 4793d 16h /openrisc/trunk/
507 Newlib libgloss board support update. Corresponding GCC port changes to support it. julius 4799d 12h /openrisc/trunk/
506 ORPSoC or1200 interrupt and syscall generation test julius 4800d 12h /openrisc/trunk/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement		 julius 4800d 12h /openrisc/trunk/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4817d 08h /openrisc/trunk/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4818d 04h /openrisc/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.