URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 819

Rev	Log message	Author	Age	Path
799	FreeRTOSV6.1.1 add cache related function from u-boot from OpenRISC enable I/D cache if present	filepang	4395d 06h	/openrisc/trunk/
798	Added drivers for ethmac and sdcard_mass_storage_controller	skrzyp	4397d 15h	/openrisc/trunk/
797	testsuite: kill test processes that timeout	pgavin	4405d 19h	/openrisc/trunk/
796	Correct orpmon show_rx_buffs and show_mac_regs to use TX_BD_NUM properly.	yannv	4408d 22h	/openrisc/trunk/
794	ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file Fixes lint warnings.	julius	4414d 23h	/openrisc/trunk/
793	Corrected Julius Baxter's email address in MAINTAINERS	jeremybennett	4425d 22h	/openrisc/trunk/
792	Added a MAINTAINERS file. 012-04-07 Jeremy Bennett <jeremy.bennett@embecosm.com> * MAINTAINERS: Added. * configure: Regenerated. * configure.ac: Updated version.	jeremybennett	4425d 22h	/openrisc/trunk/
791	Added options to configure RAM and ROM sizes. Fixed cache handling.	skrzyp	4428d 17h	/openrisc/trunk/
790	fixed issues with context switching, interrupts, optimizations and cleanups	skrzyp	4435d 17h	/openrisc/trunk/
789	ORPSoC: Patch from R Diez to make RTL sim report l.nops have equivalent formatting to those from or1ksim Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de> Acked-by: Julius Baxter <juliusbaxter@gmail.com>	julius	4439d 13h	/openrisc/trunk/