OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] - Rev 258

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5010d 14h /openrisc/trunk/or1200/
187 Or1200 sprs FPU update julius 5060d 19h /openrisc/trunk/or1200/
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5060d 22h /openrisc/trunk/or1200/
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5060d 23h /openrisc/trunk/or1200/
151 OR1200 rel3 (added some files that were not checked-in earlier) marcus.erlandsson 5069d 18h /openrisc/trunk/or1200/
142 added OpenRISC version rel3 marcus.erlandsson 5072d 02h /openrisc/trunk/or1200/
141 added OpenRISC version rel3 marcus.erlandsson 5072d 03h /openrisc/trunk/or1200/
10 or1200 added from or1k subversion repository unneback 5473d 06h /openrisc/trunk/or1200/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.