| Rev |
Log message |
Author |
Age |
Path |
| 859 |
Execute trapped instruction after breakpoint is removed
Closes bug #104
When the instruction replaced by a trap instruction is restored by the
debugger, this instruction is not executed.
Proposed solution:
- Checked for a debug unstall condition plus a trap condition in
or1200_du(dbg_stall && |except_stop).
- Then, when this event occur, flush the entire pipeline (in or1200_ctrl) and
set the pc to npc in or1200_genpc(which is equal to the trapped instruction
address).
Signed-off-by: Franck Jullien <crevars at opencores.org>
acked-by: Olof Kindgren <olof at opencores.org> |
olof |
4174d 18h |
/openrisc/trunk/or1200/ |
| 852 |
Declare pcreg_boot before usage
When things were moved around in rev 813, this error was introduced
Signed-off-by: Olof Kindgren <olof at opencores.org>
acked-by: Julius Baxter <julius at opencores.org> |
olof |
4406d 18h |
/openrisc/trunk/or1200/ |
| 847 |
or1200_genpc: fix ipcu_cycstb_o generation
In some circumstances the CPU is still waiting for the lsu to finish
while in a pre branch state. However, ipcu_cycstb_o is set and the cycle
starts with the wrong address on the iwb bus (the one before the
branched address).
This fixes this issue.
Patch by: Franck Jullien <franck.jullien@gmail.com> |
stekern |
4421d 10h |
/openrisc/trunk/or1200/ |
| 846 |
or1200: Fix for cache bug related to first_{hit|miss}_ack
Under certain circumstances, when first_hit_ack and
first_miss_ack is asserted at the same time, cache data
would wrongly be overwritten with bus data.
Patch by: Matthew Hicks <firefalcon@gmail.com> |
stekern |
4421d 10h |
/openrisc/trunk/or1200/ |
| 845 |
or1200: l.lws support
Using the l.lws instruction doesn't work currently.
It simply skips the instruction. No exception or reaction.
The patch attached simply duplicates the behaviour of
l.lwz for l.lws.
Patch by: Jeppe Græsdal Johansen <jjohan07@student.aau.dk> |
stekern |
4421d 10h |
/openrisc/trunk/or1200/ |
| 815 |
OR1200 debug unit: prevent deadlock when trap instruction stalls
As per mailing list post <20120925160925.5725e06f@latmask.vernier.se>,
the debug unit could deadlock with the instruction decoder if the trap
instruction is held back by a pipeline stall. This change prevents that.
The problem can be reproduced by placing a breakpoint at an unfavorable
position with instruction cache enabled. In our test, this occurred
with or1200-cbasic when placing a breakpoint at test_bss using gdb, but
this is dependent on such factors as cache parameters and compilation
result. |
yannv |
4442d 04h |
/openrisc/trunk/or1200/ |
| 813 |
or1200: Set correct PC after reset when parameter boot_adr is used
Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com> |
olof |
4456d 21h |
/openrisc/trunk/or1200/ |
| 809 |
OR1200: Regenerate documentation.
Forgot newline in version history table, so last entry was missing. |
julius |
4572d 14h |
/openrisc/trunk/or1200/ |
| 808 |
OR1200: Add DSX bit support to SR.
Updated documentation, revision is now 13.
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85 |
julius |
4572d 14h |
/openrisc/trunk/or1200/ |
| 806 |
OR1200: Fix for bug 90
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=90 |
julius |
4572d 14h |
/openrisc/trunk/or1200/ |
| 804 |
OR1200: Fix for bug 91
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=91 |
julius |
4572d 15h |
/openrisc/trunk/or1200/ |
| 802 |
OR1200: Fix for bug 88
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88 |
julius |
4577d 20h |
/openrisc/trunk/or1200/ |
| 794 |
ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file
Fixes lint warnings. |
julius |
4611d 05h |
/openrisc/trunk/or1200/ |
| 788 |
or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.
Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com> |
julius |
4635d 19h |
/openrisc/trunk/or1200/ |
| 679 |
Allow setting the boot address as an external
parameter. If no parameter is used, the value
from OR1200_BOOT_ADR will be used
Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com> |
olof |
4659d 20h |
/openrisc/trunk/or1200/ |
| 674 |
or1200: Fix for Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled |
julius |
4702d 04h |
/openrisc/trunk/or1200/ |
| 647 |
or1200: update documentation to go with recent rtl commits |
julius |
4822d 18h |
/openrisc/trunk/or1200/ |
| 645 |
or1200: Specification document source now in asciidoc format. ODT and MS Word format documents deprecated, PDF regenerated |
julius |
4840d 18h |
/openrisc/trunk/or1200/ |
| 644 |
or1200: the infamous l.rfe fix, and bug fix for when multiply is disabled |
julius |
4840d 19h |
/openrisc/trunk/or1200/ |
| 643 |
or1200: new ALU comparision implementation option, TLB invalidate register indicated as not present, multiply overflow detection bug fix |
julius |
4840d 19h |
/openrisc/trunk/or1200/ |
| 642 |
or1200: add carry, overflow bits, and range exception |
julius |
4840d 19h |
/openrisc/trunk/or1200/ |
| 641 |
or1200: fix serial multiply/divide bug |
julius |
4840d 19h |
/openrisc/trunk/or1200/ |
| 640 |
or1200: add l.ext instructions, fix a MAC bug |
julius |
4840d 19h |
/openrisc/trunk/or1200/ |
| 639 |
or1200: or1200_dpram.v change task set_gpr to function |
julius |
4840d 19h |
/openrisc/trunk/or1200/ |
| 481 |
OR1200 Update. RTL and spec. |
julius |
5066d 11h |
/openrisc/trunk/or1200/ |
| 431 |
Updated and move OR1200 supplementary manual.
or_debug_proxy GDB RSP interface fix.
ORPSoC S/W and makefile updates. |
julius |
5122d 21h |
/openrisc/trunk/or1200/ |
| 401 |
Fixing find first one (ff1) and find last one (fl1) support in OR1200.
Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table. |
julius |
5144d 23h |
/openrisc/trunk/or1200/ |
| 364 |
OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.
OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)
OR1200 spec updated to version 0.9, various updates.
OR1200 in ORPSoC and main OR1200 in sync, only difference is defines. |
julius |
5194d 20h |
/openrisc/trunk/or1200/ |
| 359 |
Removing duplicate OR1200 spec from docs/ path, original in or1200/doc should be used instead, also moving Japanese OR1200 spec to or1200/doc |
julius |
5197d 02h |
/openrisc/trunk/or1200/ |
| 358 |
OR1200's reset now configurable as active high or active low. Thanks to patch
from OpenCores contributor Kuoping.
Updated OR1200 in ORPSoCv2 and OR1200 project. |
julius |
5197d 05h |
/openrisc/trunk/or1200/ |
