OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [configure] - Rev 784

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
784 Patch from R Diez to ensure DejaGnu handles errors better. Autoconf infrastructure all updated.

2012-03-21 Jeremy Bennett <jeremy.bennett@embecosm.com>

Patch from R Diez <rdiezmail-openrisc@yahoo.de>

* Makefile.am: Add AM_RUNTESTFLAGS to trigger correct error
behaviour.		 jeremybennett 4441d 01h /openrisc/trunk/or1ksim/configure
625 Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available. jeremybennett 4660d 08h /openrisc/trunk/or1ksim/configure
561 or1ksim - timer module, spr-defs.h re-bugfix julius 4724d 07h /openrisc/trunk/or1ksim/configure
556 or1ksim - added performance counters unit and test for it. julius 4730d 01h /openrisc/trunk/or1ksim/configure
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4731d 09h /openrisc/trunk/or1ksim/configure
538 or1ksim updates. spr-def.h updates, Cygwin compile error fixes. julius 4758d 05h /openrisc/trunk/or1ksim/configure
532 Ensure the halted flag is cleared when the processor is unstalled. jeremybennett 4769d 02h /openrisc/trunk/or1ksim/configure
510 Updates for release 0.5.1rc1. jeremybennett 4789d 09h /openrisc/trunk/or1ksim/configure
508 Updates for Or1ksim 0.5.0rc3. jeremybennett 4790d 09h /openrisc/trunk/or1ksim/configure
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 4832d 02h /openrisc/trunk/or1ksim/configure
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 4855d 11h /openrisc/trunk/or1ksim/configure
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4882d 10h /openrisc/trunk/or1ksim/configure
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4892d 05h /openrisc/trunk/or1ksim/configure
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4903d 04h /openrisc/trunk/or1ksim/configure
440 Updated documentation to describe new Ethernet usage. jeremybennett 4910d 01h /openrisc/trunk/or1ksim/configure
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4918d 19h /openrisc/trunk/or1ksim/configure
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4922d 01h /openrisc/trunk/or1ksim/configure
432 Updates to handle interrupts correctly. jeremybennett 4923d 05h /openrisc/trunk/or1ksim/configure
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 4929d 01h /openrisc/trunk/or1ksim/configure
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4937d 05h /openrisc/trunk/or1ksim/configure

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.