| Rev |
Log message |
Author |
Age |
Path |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
5151d 12h |
/openrisc/trunk/orpsocv2/ |
| 501 |
ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default |
julius |
5152d 13h |
/openrisc/trunk/orpsocv2/ |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
5152d 16h |
/openrisc/trunk/orpsocv2/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
5153d 09h |
/openrisc/trunk/orpsocv2/ |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
5155d 19h |
/openrisc/trunk/orpsocv2/ |
| 495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
5155d 19h |
/openrisc/trunk/orpsocv2/ |
| 493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
5168d 21h |
/openrisc/trunk/orpsocv2/ |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
5169d 19h |
/openrisc/trunk/orpsocv2/ |
| 491 |
ORPSoC or1200_monitor update. |
julius |
5170d 06h |
/openrisc/trunk/orpsocv2/ |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
5179d 19h |
/openrisc/trunk/orpsocv2/ |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
5179d 19h |
/openrisc/trunk/orpsocv2/ |
| 487 |
ORPSoC main software makefile update |
julius |
5182d 17h |
/openrisc/trunk/orpsocv2/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
5182d 17h |
/openrisc/trunk/orpsocv2/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
5186d 22h |
/openrisc/trunk/orpsocv2/ |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
5204d 02h |
/openrisc/trunk/orpsocv2/ |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
5205d 01h |
/openrisc/trunk/orpsocv2/ |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
5206d 17h |
/openrisc/trunk/orpsocv2/ |
| 477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
5207d 01h |
/openrisc/trunk/orpsocv2/ |
| 476 |
ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. |
julius |
5207d 18h |
/openrisc/trunk/orpsocv2/ |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
5207d 21h |
/openrisc/trunk/orpsocv2/ |
