OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] - Rev 412

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 4934d 19h /openrisc/trunk/orpsocv2/boards/actel/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 4935d 19h /openrisc/trunk/orpsocv2/boards/actel/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4936d 07h /openrisc/trunk/orpsocv2/boards/actel/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.