| Rev |
Log message |
Author |
Age |
Path |
| 630 |
orpsoc: add Digilent Atlys spartan6 board backend
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4645d 20h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 629 |
orpsoc: add Digilent Atlys spartan6 board or1ksim configuration
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4645d 20h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 628 |
orpsoc: add Digilent Atlys spartan6 board Makefiles
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4645d 20h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 627 |
orpsoc: add Digilent Atlys spartan6 board rtl
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> |
stekern |
4645d 20h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 568 |
OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation |
julius |
4698d 13h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 563 |
Search for external cores in <board>/modules path |
olof |
4711d 02h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 560 |
ORPSoC update - update make scripts, XILINX_PATH setup changes.
Note - may require a change to XILINX_PATH on user systems. |
julius |
4719d 01h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 542 |
ORPSoC scripts cleanup. Now centralised.
Documentation updated for ml501's SPI programming, noting issues with ISE12. |
julius |
4742d 04h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4765d 14h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 503 |
ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. |
julius |
4809d 01h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4811d 05h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 500 |
ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc
ML501 simulation makefile update to allow custom ELFs to be specified |
julius |
4812d 08h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4813d 01h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
4815d 12h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
4829d 12h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
4842d 09h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4846d 14h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
4863d 18h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
4864d 18h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
4866d 09h |
/openrisc/trunk/orpsocv2/boards/xilinx/ |
