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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [atlys/] [backend/] - Rev 866

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866 orpsocv2: correct build/par issue on Atlys board

From patch submission e-mail:

The first of the series is an issue that has been around since the
beginning (at least based on the svn log files) and traces its root to the
first Xilinx board supported by orpsocv2, the ML501. Apparently Makefile
for the final place-and-route process in all the builds contains a typo
which leads to the routing tool not using any timing constraint at all.

Patch by: Jason Zheng <jxzheng@gmail.com>		 stekern 3674d 04h /openrisc/trunk/orpsocv2/boards/xilinx/atlys/backend/
638 orpsoc: xilinx: use XILINX env variable

instead of rely on custom environment variables,
use the XILINX variable and instruct the user how to
source the scripts that set it.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4641d 06h /openrisc/trunk/orpsocv2/boards/xilinx/atlys/backend/
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file		 stekern 4646d 06h /openrisc/trunk/orpsocv2/boards/xilinx/atlys/backend/
630 orpsoc: add Digilent Atlys spartan6 board backend

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4646d 06h /openrisc/trunk/orpsocv2/boards/xilinx/atlys/backend/
628 orpsoc: add Digilent Atlys spartan6 board Makefiles

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4646d 06h /openrisc/trunk/orpsocv2/boards/xilinx/atlys/backend/

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