URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [include/] [uart_defines.v] - Rev 502

Rev	Log message	Author	Age	Path
502	ORPSoC update - or1200, ethmac Xilinx fifos or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default	julius	4816d 03h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v
496	ORPSoC ml501 updates - increased frequency, updated documentation	julius	4820d 10h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v
412	ORPSoC update - Rearranged Xilinx ML501, simulations working again.	julius	4942d 20h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/uart_defines.v