URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [sim/] [bin/] [Makefile] - Rev 412

Rev	Log message	Author	Age	Path
412	ORPSoC update - Rearranged Xilinx ML501, simulations working again.	julius	4936d 04h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/bin/Makefile
71	ORPSoC board builds, adding readmes	julius	5190d 20h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/bin/Makefile
69	ORPSoC xilinx ml501 board update - added ethernet eupport and software test	julius	5195d 02h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/bin/Makefile
67	New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory	julius	5197d 20h	/openrisc/trunk/orpsocv2/boards/xilinx/ml501/sim/bin/Makefile