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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] - Rev 630

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Rev Log message Author Age Path
619 ORPSoC OR1200 fix and regression test for bug 51.

signed-off Julius Baxter
reviewed by Stefan Kristiansson
julius 4667d 05h /openrisc/trunk/orpsocv2/rtl/
618 Remove unused parameter Tp olof 4667d 12h /openrisc/trunk/orpsocv2/rtl/
570 Fix white space in ethmac headers olof 4682d 07h /openrisc/trunk/orpsocv2/rtl/
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4729d 14h /openrisc/trunk/orpsocv2/rtl/
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4730d 07h /openrisc/trunk/orpsocv2/rtl/
545 ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. julius 4736d 09h /openrisc/trunk/orpsocv2/rtl/
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4736d 16h /openrisc/trunk/orpsocv2/rtl/
537 ORPSoC or1200 fix for l.rfe bug, and when multiply is disabled. julius 4753d 04h /openrisc/trunk/orpsocv2/rtl/
536 ORPSoC - removing duplicate ethmac toplevel file. julius 4756d 17h /openrisc/trunk/orpsocv2/rtl/
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4765d 16h /openrisc/trunk/orpsocv2/rtl/
506 ORPSoC or1200 interrupt and syscall generation test julius 4791d 10h /openrisc/trunk/orpsocv2/rtl/
505 OR1200 overflow detection fixup

SPIflash program update

or1200 driver library timer improvement
julius 4791d 11h /openrisc/trunk/orpsocv2/rtl/
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4808d 07h /openrisc/trunk/orpsocv2/rtl/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4809d 03h /openrisc/trunk/orpsocv2/rtl/
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4811d 07h /openrisc/trunk/orpsocv2/rtl/
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default
julius 4812d 07h /openrisc/trunk/orpsocv2/rtl/
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4813d 03h /openrisc/trunk/orpsocv2/rtl/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4846d 16h /openrisc/trunk/orpsocv2/rtl/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4864d 20h /openrisc/trunk/orpsocv2/rtl/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4866d 12h /openrisc/trunk/orpsocv2/rtl/

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