| Rev |
Log message |
Author |
Age |
Path |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
4872d 13h |
/openrisc/trunk/orpsocv2/sw/ |
| 470 |
ORPSoC OR1200 crt0 updates. |
julius |
4876d 13h |
/openrisc/trunk/orpsocv2/sw/ |
| 468 |
ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI |
julius |
4877d 15h |
/openrisc/trunk/orpsocv2/sw/ |
| 466 |
ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README |
julius |
4878d 18h |
/openrisc/trunk/orpsocv2/sw/ |
| 465 |
ORPSoC SPI flash load Makefile and README updates. |
julius |
4879d 08h |
/openrisc/trunk/orpsocv2/sw/ |
| 462 |
ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.
RAM models updated. |
julius |
4879d 17h |
/openrisc/trunk/orpsocv2/sw/ |
| 449 |
ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.
Replace use of "clean-all" with "distclean" as make rule to clean things. |
julius |
4904d 04h |
/openrisc/trunk/orpsocv2/sw/ |
| 439 |
ORPSoC update
Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST
Multiply/divide tests for to run on target.
Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.
Added ability to use ram_wb as internal memory on ML501 design.
Fixed ethernet MAC tests for ML501. |
julius |
4911d 08h |
/openrisc/trunk/orpsocv2/sw/ |
| 435 |
ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality. |
julius |
4917d 23h |
/openrisc/trunk/orpsocv2/sw/ |
| 431 |
Updated and move OR1200 supplementary manual.
or_debug_proxy GDB RSP interface fix.
ORPSoC S/W and makefile updates. |
julius |
4924d 07h |
/openrisc/trunk/orpsocv2/sw/ |
| 426 |
ORPSoC update
Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.
ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued... |
julius |
4930d 23h |
/openrisc/trunk/orpsocv2/sw/ |
| 425 |
ORPSoC update:
GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.
Documentation updated.
Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.
Updated Or1200 tests to report test success value and then
exit with value 0. |
julius |
4931d 00h |
/openrisc/trunk/orpsocv2/sw/ |
| 415 |
ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash. |
julius |
4939d 09h |
/openrisc/trunk/orpsocv2/sw/ |
| 412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
4942d 22h |
/openrisc/trunk/orpsocv2/sw/ |
| 411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
4943d 10h |
/openrisc/trunk/orpsocv2/sw/ |
| 409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
4944d 10h |
/openrisc/trunk/orpsocv2/sw/ |
| 408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
4944d 23h |
/openrisc/trunk/orpsocv2/sw/ |
| 403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
4946d 04h |
/openrisc/trunk/orpsocv2/sw/ |
| 397 |
ORPSoCv2:
doc/ path added, with Texinfo documentation. Still a work in progress.
VPI files updated.
OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.
Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build. |
julius |
4948d 10h |
/openrisc/trunk/orpsocv2/sw/ |
| 396 |
ORPSoCv2 final software fixes...for now. See updated README |
julius |
4951d 08h |
/openrisc/trunk/orpsocv2/sw/ |
