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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [crt0.S] - Rev 393

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393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 4951d 12h /openrisc/trunk/orpsocv2/sw/drivers/or1200/crt0.S
373 ORPSoCv2 software update for compatibility with OR toolchain 1.0 julius 4984d 11h /crt0.S
354 Fixed ORPSoCv2 Dhrystone test, rewrote timer interrut

* sw/support/crt0.S: Tick timer interrupt to increment variable
now in place instead of calling customisable
interrupt vector handler

Changed all system frequencies in design to 50MHz.
julius 5000d 09h /crt0.S
349 ORPSoCv2 update with new software and makefile update julius 5001d 13h /crt0.S

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