OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [lib/] - Rev 542

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
489 ORPSoC sw cleanup. Remove warnings. julius 4846d 14h /openrisc/trunk/orpsocv2/sw/lib/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4853d 17h /openrisc/trunk/orpsocv2/sw/lib/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 4879d 18h /openrisc/trunk/orpsocv2/sw/lib/
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 4953d 12h /openrisc/trunk/orpsocv2/sw/lib/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.