| Rev |
Log message |
Author |
Age |
Path |
| 858 |
orpsoc/tests: Fix or1200-dsxinsn when caches are not present
This test would go into an endless loop when caches are not present. |
stekern |
4080d 16h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 807 |
ORPSoC: Commit for bug 85 - add DSX support to OR1200.
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85
Also added software tests, and added these tests to default regression test list |
julius |
4378d 06h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 805 |
ORPSoC: Fix for bug 90 - EPCR on range exception bug
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=90 |
julius |
4378d 06h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 803 |
ORPSoC: Fix for bug 91, l.sub not setting overflow flag correctly
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=91 |
julius |
4378d 07h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 801 |
ORPSoC: Fix bug 88
http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88 |
julius |
4383d 12h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 672 |
ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled
OR1200 RTL fix and software test added. |
julius |
4544d 07h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 671 |
ORPSoC: Fix for Bug 75 - or1200-except and or1200-ticksyscall regression tests failing due to change in memory model |
julius |
4544d 07h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 619 |
ORPSoC OR1200 fix and regression test for bug 51.
signed-off Julius Baxter
reviewed by Stefan Kristiansson |
julius |
4676d 08h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 535 |
ORPSoC - adding sw tests for l.rfe |
julius |
4767d 11h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 530 |
ORPSoC update
Ethernet MAC Wishbone interface fixes
Beginnings of software update.
ML501 backend script fixes for new ISE |
julius |
4774d 20h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 506 |
ORPSoC or1200 interrupt and syscall generation test |
julius |
4800d 14h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 504 |
ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup |
julius |
4817d 11h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 502 |
ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default |
julius |
4820d 11h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 499 |
ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup |
julius |
4822d 07h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
4848d 17h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
4848d 18h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
4855d 20h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
4876d 00h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
4876d 19h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
| 466 |
ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README |
julius |
4883d 00h |
/openrisc/trunk/orpsocv2/sw/tests/or1200/ |
