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Rev Log message Author Age Path
801 ORPSoC: Fix bug 88

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88		 julius 4593d 17h /
800 FreeRTOSV6.1.1
add or32_dma demo task for test dcache manuplation function
add simple driver of wb_dma		 filepang 4606d 08h /
799 FreeRTOSV6.1.1
add cache related function from u-boot from OpenRISC
enable I/D cache if present		 filepang 4607d 08h /
798 Added drivers for ethmac and sdcard_mass_storage_controller skrzyp 4609d 17h /
797 testsuite: kill test processes that timeout pgavin 4617d 22h /
796 Correct orpmon show_rx_buffs and show_mac_regs to use TX_BD_NUM properly. yannv 4621d 01h /
795 Created or1200_rel3 branch from rev 794 olof 4621d 16h /
794 ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file

Fixes lint warnings.		 julius 4627d 02h /
793 Corrected Julius Baxter's email address in MAINTAINERS jeremybennett 4638d 01h /
792 Added a MAINTAINERS file.

012-04-07 Jeremy Bennett <jeremy.bennett@embecosm.com>

* MAINTAINERS: Added.
* configure: Regenerated.
* configure.ac: Updated version.		 jeremybennett 4638d 01h /
791 Added options to configure RAM and ROM sizes. Fixed cache handling. skrzyp 4640d 19h /
790 fixed issues with context switching, interrupts, optimizations and cleanups skrzyp 4647d 20h /
789 ORPSoC: Patch from R Diez to make RTL sim report l.nops have equivalent formatting to those from or1ksim

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 julius 4651d 15h /
788 or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 julius 4651d 16h /
787 Patch from R Diez to zero R0 on startup. ChangeLog from testsuite/test-code-or1k:

2012-03-23 Jeremy Bennett <jeremy.bennett@embecosm.com>

Patch from R Diez <rdiezmail-openrisc@yahoo.de>

* cache/cache-asm.S, cfg/cfg.S, except-test/except-test-s.S,
* except/except.S, ext/ext.S, flag/flag.S, fp/fp.S,
* inst-set-test/inst-set-test.S, int-test/int-test.S,
* mc-common/except-mc.S, uos/except-or32.S: Clear R0 on
start-up. There is no guarantee that R0 is hardwired to zero, and
indeed it is not when simulating the or1200 Verilog core.
* configure: Regenerated.
* configure.ac: Updated version.		 jeremybennett 4653d 00h /
786 new ecos tree (tracking mainline) skrzyp 4653d 00h /
785 We are about to upload a new tree (that has a different structure) skrzyp 4653d 01h /
784 Patch from R Diez to ensure DejaGnu handles errors better. Autoconf infrastructure all updated.

2012-03-21 Jeremy Bennett <jeremy.bennett@embecosm.com>

Patch from R Diez <rdiezmail-openrisc@yahoo.de>

* Makefile.am: Add AM_RUNTESTFLAGS to trigger correct error
behaviour.		 jeremybennett 4654d 15h /
783 Initial dev directory snapshot with FSF GCC mainline jeremybennett 4668d 14h /
782 Tags directory for GNU development tool chain. jeremybennett 4668d 14h /

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