OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 978

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
978 Added variable delay for SRAM. lampret 7955d 00h /
977 Added store buffer. lampret 7955d 00h /
976 Added store buffer lampret 7955d 00h /
975 First checkin lampret 7955d 00h /
974 Enabled what works on or1ksim and disabled other tests. lampret 7955d 02h /
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 7957d 07h /
972 Interrupt suorces fixed. simons 7957d 07h /
971 Now even keyboard test passes. simons 7957d 10h /
970 Testbench is now running on ORP architecture platform. simons 7957d 23h /
969 Checking in except directory. lampret 7958d 14h /
968 Checking in utils directory. lampret 7958d 14h /
967 Checking in mul directory. lampret 7958d 14h /
966 Checking in cbasic directory. lampret 7958d 14h /
965 Checking in basic directory. lampret 7958d 14h /
964 Checking in support directory. lampret 7958d 14h /
963 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7958d 14h /
962 Fixed Xilinx trace buffer address. REported by Taylor Su. lampret 7958d 14h /
961 uart16550 RTL files renamed/added/removed. lampret 7958d 14h /
960 Directory cleanup. lampret 7958d 15h /
959 Fixed size of generic flash/sram to exactly 2MB lampret 7959d 14h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.