URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 985

Rev	Log message	Author	Age	Path
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	7954d 16h	/
984	Disable SB until it is tested	lampret	7954d 16h	/
983	First checkin	lampret	7954d 18h	/
982	Moved to sim/bin	lampret	7954d 18h	/
981	First checkin.	lampret	7954d 18h	/
980	Removed sim.tcl that shouldn't be here.	lampret	7954d 18h	/
979	Removed old test case binaries.	lampret	7954d 18h	/
978	Added variable delay for SRAM.	lampret	7954d 18h	/
977	Added store buffer.	lampret	7954d 18h	/
976	Added store buffer	lampret	7954d 18h	/
975	First checkin	lampret	7954d 18h	/
974	Enabled what works on or1ksim and disabled other tests.	lampret	7954d 20h	/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	7957d 00h	/
972	Interrupt suorces fixed.	simons	7957d 01h	/
971	Now even keyboard test passes.	simons	7957d 03h	/
970	Testbench is now running on ORP architecture platform.	simons	7957d 16h	/
969	Checking in except directory.	lampret	7958d 08h	/
968	Checking in utils directory.	lampret	7958d 08h	/
967	Checking in mul directory.	lampret	7958d 08h	/
966	Checking in cbasic directory.	lampret	7958d 08h	/