OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 990

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
990 Test is now complete. simons 7942d 00h /
989 c++ is making problems so, for now, it is excluded. simons 7943d 08h /
988 ORP architecture supported. simons 7943d 23h /
987 ORP architecture supported. simons 7944d 06h /
986 outputs out of function are not registered anymore markom 7944d 07h /
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7944d 19h /
984 Disable SB until it is tested lampret 7944d 19h /
983 First checkin lampret 7944d 21h /
982 Moved to sim/bin lampret 7944d 21h /
981 First checkin. lampret 7944d 21h /
980 Removed sim.tcl that shouldn't be here. lampret 7944d 21h /
979 Removed old test case binaries. lampret 7944d 21h /
978 Added variable delay for SRAM. lampret 7944d 21h /
977 Added store buffer. lampret 7944d 21h /
976 Added store buffer lampret 7944d 21h /
975 First checkin lampret 7944d 21h /
974 Enabled what works on or1ksim and disabled other tests. lampret 7944d 23h /
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 7947d 03h /
972 Interrupt suorces fixed. simons 7947d 03h /
971 Now even keyboard test passes. simons 7947d 06h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.