URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 993

Rev	Log message	Author	Age	Path
993	Fixed IMMU bug.	lampret	7951d 12h	/
992	A bug when cache enabled and bus error comes fixed.	simons	7951d 21h	/
991	Different memory controller.	simons	7951d 21h	/
990	Test is now complete.	simons	7951d 21h	/
989	c++ is making problems so, for now, it is excluded.	simons	7953d 05h	/
988	ORP architecture supported.	simons	7953d 20h	/
987	ORP architecture supported.	simons	7954d 04h	/
986	outputs out of function are not registered anymore	markom	7954d 04h	/
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	7954d 16h	/
984	Disable SB until it is tested	lampret	7954d 16h	/
983	First checkin	lampret	7954d 18h	/
982	Moved to sim/bin	lampret	7954d 18h	/
981	First checkin.	lampret	7954d 18h	/
980	Removed sim.tcl that shouldn't be here.	lampret	7954d 18h	/
979	Removed old test case binaries.	lampret	7954d 18h	/
978	Added variable delay for SRAM.	lampret	7954d 18h	/
977	Added store buffer.	lampret	7954d 18h	/
976	Added store buffer	lampret	7954d 18h	/
975	First checkin	lampret	7954d 18h	/
974	Enabled what works on or1ksim and disabled other tests.	lampret	7954d 20h	/