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[/] [or1k/] [tags/] [nog_patch_62/] [gen_or1k_isa/] [sources/] [opcode/] - Rev 1765

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1765 root 5549d 04h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1449 This commit was manufactured by cvs2svn to create tag 'nog_patch_62'. 6989d 11h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 6989d 11h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7004d 14h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7039d 09h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1346 Remove the global op structure nogj 7052d 13h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7052d 13h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7052d 14h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1338 l.ff1 instruction added andreje 7068d 11h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1309 removed includes phoenix 7241d 07h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1308 Gyorgy Jeney: extensive cleanup phoenix 7244d 04h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7266d 04h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1286 Changed desciption of the l.cust5 insns lampret 7315d 07h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1285 Changed desciption of the l.cust5 insns lampret 7315d 07h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1169 Added support for l.addc instruction. csanchez 7628d 07h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1114 Added cvs log keywords lampret 7782d 23h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
1034 Fixed encoding for l.div/l.divu. lampret 7925d 00h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
879 Initial version of OpenRISC Custom Unit Compiler added markom 7990d 10h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
801 l.muli instruction added markom 8082d 14h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/
722 floating point registers are obsolete; GPRs should be used instead markom 8110d 13h /or1k/tags/nog_patch_62/gen_or1k_isa/sources/opcode/

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