Rev |
Log message |
Author |
Age |
Path |
1440 |
Reclasify l.trap and l.sys to be an exception instruction |
nogj |
7000d 07h |
/or1k/tags/nog_patch_62/insight/ |
1384 |
Fix the parameters to the l.ff1/l.maci instructions |
nogj |
7015d 11h |
/or1k/tags/nog_patch_62/insight/ |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7050d 05h |
/or1k/tags/nog_patch_62/insight/ |
1346 |
Remove the global op structure |
nogj |
7063d 09h |
/or1k/tags/nog_patch_62/insight/ |
1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7063d 09h |
/or1k/tags/nog_patch_62/insight/ |
1342 |
* Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option. |
nogj |
7063d 09h |
/or1k/tags/nog_patch_62/insight/ |
1341 |
Mark wich operand is the destination operand in the architechture definition |
nogj |
7063d 10h |
/or1k/tags/nog_patch_62/insight/ |
1338 |
l.ff1 instruction added |
andreje |
7079d 07h |
/or1k/tags/nog_patch_62/insight/ |
1333 |
gcc 3.4 compile fix |
phoenix |
7094d 08h |
/or1k/tags/nog_patch_62/insight/ |
1309 |
removed includes |
phoenix |
7252d 03h |
/or1k/tags/nog_patch_62/insight/ |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7255d 00h |
/or1k/tags/nog_patch_62/insight/ |
1295 |
Updated instruction set descriptions. Changed FP instructions encoding. |
lampret |
7277d 00h |
/or1k/tags/nog_patch_62/insight/ |
1286 |
Changed desciption of the l.cust5 insns |
lampret |
7326d 03h |
/or1k/tags/nog_patch_62/insight/ |
1285 |
Changed desciption of the l.cust5 insns |
lampret |
7326d 03h |
/or1k/tags/nog_patch_62/insight/ |
1256 |
page size is 8192 on or32 |
phoenix |
7411d 03h |
/or1k/tags/nog_patch_62/insight/ |
1169 |
Added support for l.addc instruction. |
csanchez |
7639d 03h |
/or1k/tags/nog_patch_62/insight/ |
1152 |
*** empty log message *** |
phoenix |
7719d 06h |
/or1k/tags/nog_patch_62/insight/ |
1149 |
*** empty log message *** |
phoenix |
7719d 20h |
/or1k/tags/nog_patch_62/insight/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7722d 02h |
/or1k/tags/nog_patch_62/insight/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7722d 17h |
/or1k/tags/nog_patch_62/insight/ |