OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_71/] [gen_or1k_isa/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5548d 11h /or1k/tags/nog_patch_71/gen_or1k_isa/
1468 This commit was manufactured by cvs2svn to create tag 'nog_patch_71'. 6988d 18h /or1k/tags/nog_patch_71/gen_or1k_isa/
1452 Implement a dynamic recompiler to speed up the execution nogj 6988d 18h /or1k/tags/nog_patch_71/gen_or1k_isa/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 6988d 18h /or1k/tags/nog_patch_71/gen_or1k_isa/
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7003d 21h /or1k/tags/nog_patch_71/gen_or1k_isa/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7003d 21h /or1k/tags/nog_patch_71/gen_or1k_isa/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7038d 16h /or1k/tags/nog_patch_71/gen_or1k_isa/
1346 Remove the global op structure nogj 7051d 20h /or1k/tags/nog_patch_71/gen_or1k_isa/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7051d 20h /or1k/tags/nog_patch_71/gen_or1k_isa/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7051d 21h /or1k/tags/nog_patch_71/gen_or1k_isa/
1338 l.ff1 instruction added andreje 7067d 18h /or1k/tags/nog_patch_71/gen_or1k_isa/
1309 removed includes phoenix 7240d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1308 Gyorgy Jeney: extensive cleanup phoenix 7243d 11h /or1k/tags/nog_patch_71/gen_or1k_isa/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7265d 11h /or1k/tags/nog_patch_71/gen_or1k_isa/
1286 Changed desciption of the l.cust5 insns lampret 7314d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1285 Changed desciption of the l.cust5 insns lampret 7314d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1169 Added support for l.addc instruction. csanchez 7627d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1114 Added cvs log keywords lampret 7782d 06h /or1k/tags/nog_patch_71/gen_or1k_isa/
1113 Typos by Maria Bolado lampret 7782d 06h /or1k/tags/nog_patch_71/gen_or1k_isa/
1111 Small fix for path of tth binary. lampret 7797d 13h /or1k/tags/nog_patch_71/gen_or1k_isa/
1110 Re-generated. lampret 7797d 13h /or1k/tags/nog_patch_71/gen_or1k_isa/
1109 Temp files should rather not be in the cvs repository. lampret 7797d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1108 Errors fixed. lampret 7797d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1107 Updatded and improved formatting. lampret 7797d 14h /or1k/tags/nog_patch_71/gen_or1k_isa/
1034 Fixed encoding for l.div/l.divu. lampret 7924d 07h /or1k/tags/nog_patch_71/gen_or1k_isa/
955 typos and grammar fixed markom 7950d 19h /or1k/tags/nog_patch_71/gen_or1k_isa/
879 Initial version of OpenRISC Custom Unit Compiler added markom 7989d 17h /or1k/tags/nog_patch_71/gen_or1k_isa/
801 l.muli instruction added markom 8081d 21h /or1k/tags/nog_patch_71/gen_or1k_isa/
722 floating point registers are obsolete; GPRs should be used instead markom 8109d 20h /or1k/tags/nog_patch_71/gen_or1k_isa/
720 single floating point support added markom 8110d 00h /or1k/tags/nog_patch_71/gen_or1k_isa/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.