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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [gen_or1k_isa/] - Rev 1765

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1765 root 5529d 14h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1753 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc2'. 5648d 21h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.		 jeremybennett 5678d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1672 Store instructions don't modify any register. Don't mark them as such in the
arch. definitions		 nogj 6675d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1656 Pass the instruction operands as part of the op_queue structure. nogj 6675d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1605 Execute l.ff1 instruction nogj 6737d 18h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1601 fixed description of l.sfXXXi lampret 6739d 21h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1597 Fix parsing the destination register nogj 6749d 20h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1591 Added l.fl1, fixed desc of l.ff1 lampret 6752d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1590 Added l.fl1 lampret 6752d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1557 Fix most warnings issued by gcc4 nogj 6812d 03h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1554 fixed l.maci encoding phoenix 6829d 14h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 6942d 17h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1452 Implement a dynamic recompiler to speed up the execution nogj 6969d 20h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 6969d 20h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 6985d 00h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 6985d 00h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7019d 19h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1346 Remove the global op structure nogj 7032d 22h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7032d 23h /or1k/tags/rel-0-3-0-rc2/gen_or1k_isa/

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