OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_14/] [or1200/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5539d 20h /or1k/tags/rel_14/or1200/
1190 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7562d 10h /or1k/tags/rel_14/or1200/
1188 Added support for rams with byte write access. simons 7562d 10h /or1k/tags/rel_14/or1200/
1186 Added support for rams with byte write access. simons 7563d 09h /or1k/tags/rel_14/or1200/
1184 Scan signals mess fixed. simons 7570d 02h /or1k/tags/rel_14/or1200/
1179 BIST interface added for Artisan memory instances. simons 7578d 06h /or1k/tags/rel_14/or1200/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7644d 16h /or1k/tags/rel_14/or1200/
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7687d 19h /or1k/tags/rel_14/or1200/
1155 No functional change. Only added customization for exception vectors. lampret 7690d 21h /or1k/tags/rel_14/or1200/
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7703d 22h /or1k/tags/rel_14/or1200/
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7703d 22h /or1k/tags/rel_14/or1200/
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7704d 18h /or1k/tags/rel_14/or1200/
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7704d 18h /or1k/tags/rel_14/or1200/
1130 RFRAM type always need to be defined. lampret 7704d 18h /or1k/tags/rel_14/or1200/
1129 Added Altera LPM RAMs. Changed generic RAM output when OE inactive. lampret 7704d 18h /or1k/tags/rel_14/or1200/
1112 Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs] lampret 7779d 16h /or1k/tags/rel_14/or1200/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7824d 10h /or1k/tags/rel_14/or1200/
1083 SB mem width fixed. simons 7856d 05h /or1k/tags/rel_14/or1200/
1079 RAMs wrong connected to the BIST scan chain. mohor 7865d 02h /or1k/tags/rel_14/or1200/
1078 Previous check-in was done by mistake. mohor 7865d 04h /or1k/tags/rel_14/or1200/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.