OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_19/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5531d 21h /or1k/tags/rel_19/
1221 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7442d 06h /tags/rel_19/
1220 Exception prefix configuration changed. simons 7442d 06h /branches/branch_qmem/
1219 Qmem mbist signals fixed. simons 7442d 06h /branches/branch_qmem/
1216 Support for ram with byte selects added. simons 7449d 05h /branches/branch_qmem/
1214 Mbist nameing changed, Artisan ram instance signal names fixed, some synthesis waning fixed. simons 7450d 08h /branches/branch_qmem/
1213 This commit was manufactured by cvs2svn to create branch 'branch_qmem'. 7454d 20h /branches/branch_qmem/
1210 No functional change. lampret 7454d 20h /branches/branch_qmem/
1209 Fixed instantiation name. lampret 7454d 20h /branches/branch_qmem/
1207 Static exception prefix. lampret 7454d 20h /branches/branch_qmem/
1206 Static exception prefix. lampret 7454d 20h /branches/branch_qmem/
1175 Added three missing wire declarations. No functional changes. lampret 7601d 19h /branches/branch_qmem/
1173 Added QMEM. lampret 7604d 04h /branches/branch_qmem/
1172 Added embedded memory QMEM. lampret 7604d 04h /branches/branch_qmem/
1171 Added embedded memory QMEM. lampret 7604d 05h /branches/branch_qmem/
1163 This commit was manufactured by cvs2svn to create branch 'branch_qmem'. 7636d 17h /branches/branch_qmem/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7636d 17h /trunk/
1160 added missing .rodata.* section into rom linker script phoenix 7667d 17h /trunk/
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7679d 20h /trunk/
1158 Added simple uart test case. lampret 7680d 21h /trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.