OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_4/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
992 A bug when cache enabled and bus error comes fixed. simons 7920d 20h /or1k/tags/rel_4/
991 Different memory controller. simons 7920d 20h /or1k/tags/rel_4/
990 Test is now complete. simons 7920d 20h /or1k/tags/rel_4/
989 c++ is making problems so, for now, it is excluded. simons 7922d 04h /or1k/tags/rel_4/
988 ORP architecture supported. simons 7922d 19h /or1k/tags/rel_4/
987 ORP architecture supported. simons 7923d 03h /or1k/tags/rel_4/
986 outputs out of function are not registered anymore markom 7923d 03h /or1k/tags/rel_4/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7923d 15h /or1k/tags/rel_4/
984 Disable SB until it is tested lampret 7923d 15h /or1k/tags/rel_4/
983 First checkin lampret 7923d 17h /or1k/tags/rel_4/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.