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[/] [or1k/] [tags/] [stable_0_1_0/] [or1ksim/] [pm/] - Rev 1765

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Rev Log message Author Age Path
1765 root 5547d 21h /or1k/tags/stable_0_1_0/or1ksim/pm/
1357 This commit was manufactured by cvs2svn to create tag 'stable_0_1_0'. 7036d 10h /or1k/tags/stable_0_1_0/or1ksim/pm/
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7036d 10h /or1k/tags/stable_0_1_0/or1ksim/pm/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7038d 02h /or1k/tags/stable_0_1_0/or1ksim/pm/
1249 Downgrading back to automake-1.4 lampret 7407d 21h /or1k/tags/stable_0_1_0/or1ksim/pm/
1117 Ignore generated files for CVS purposes sfurman 7750d 21h /or1k/tags/stable_0_1_0/or1ksim/pm/
997 PRINTF should be used instead of printf; command redirection repaired markom 7939d 11h /or1k/tags/stable_0_1_0/or1ksim/pm/
970 Testbench is now running on ORP architecture platform. simons 7946d 22h /or1k/tags/stable_0_1_0/or1ksim/pm/
876 Beta release of ATA simulation rherveille 7990d 21h /or1k/tags/stable_0_1_0/or1ksim/pm/
805 kbd, fb, vga devices now uses scheduler markom 8074d 13h /or1k/tags/stable_0_1_0/or1ksim/pm/
517 some performance optimizations markom 8170d 06h /or1k/tags/stable_0_1_0/or1ksim/pm/
500 Added .cvsignore files for annoying generated files erez 8172d 10h /or1k/tags/stable_0_1_0/or1ksim/pm/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8242d 09h /or1k/tags/stable_0_1_0/or1ksim/pm/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8319d 06h /or1k/tags/stable_0_1_0/or1ksim/pm/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8401d 15h /or1k/tags/stable_0_1_0/or1ksim/pm/

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