OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim/] [testbench/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5556d 07h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1647 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0'. 6703d 11h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6703d 11h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6748d 06h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1578 Put consecutive asm statements into one __asm__() block to prevent gcc from scheduleing other instructions between them. nogj 6814d 19h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1568 Update config files nogj 6837d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1566 Make the timer test emit the correct success protocol nogj 6837d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1565 Revert previous `fix' to accept the correct return code nogj 6837d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1552 Update most config.guess and config.sub scripts. robertmh 6884d 10h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1549 Spelling fixes nogj 6900d 10h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1540 * Breakup the tick_job function into smaller ones.
* Fix lots of conner cases.
* Add tests for the tick timer.		 nogj 6900d 10h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1523 Bring config files up-to-date with recent changes nogj 6905d 19h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1498 Correct a couple of tests nogj 6920d 17h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1497 Print more verbose ouput nogj 6920d 17h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 6948d 19h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1446 Cosmetic fixes nogj 6996d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1424 Update the config files for the tests to the new format nogj 6996d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1422 Remove the useless include "sys/time.h" nogj 6996d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1420 Fix test to expect the correct `return code' nogj 6996d 14h /or1k/tags/stable_0_2_0/or1ksim/testbench/
1355 Fix dmatest testcase nogj 7044d 20h /or1k/tags/stable_0_2_0/or1ksim/testbench/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.