OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [pm/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5541d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1572 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'. 6816d 06h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6891d 11h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 6982d 06h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1376 aclocal && autoconf && automake phoenix 7016d 10h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7023d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7032d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1249 Downgrading back to automake-1.4 lampret 7401d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
1117 Ignore generated files for CVS purposes sfurman 7744d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
997 PRINTF should be used instead of printf; command redirection repaired markom 7933d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
970 Testbench is now running on ORP architecture platform. simons 7941d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
876 Beta release of ATA simulation rherveille 7984d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
805 kbd, fb, vga devices now uses scheduler markom 8068d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
517 some performance optimizations markom 8164d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
500 Added .cvsignore files for annoying generated files erez 8166d 12h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8236d 11h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8313d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8395d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/pm/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.