OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc3/] [gdb-5.0/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5534d 20h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1648 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc3'. 6681d 23h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6681d 23h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1552 Update most config.guess and config.sub scripts. robertmh 6862d 23h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1452 Implement a dynamic recompiler to speed up the execution nogj 6975d 03h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 6975d 03h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7038d 05h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7038d 05h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7038d 06h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1338 l.ff1 instruction added andreje 7054d 03h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1333 gcc 3.4 compile fix phoenix 7069d 04h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1330 jtag bugfix phoenix 7077d 22h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1256 page size is 8192 on or32 phoenix 7385d 23h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1169 Added support for l.addc instruction. csanchez 7614d 00h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1152 *** empty log message *** phoenix 7694d 03h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1149 *** empty log message *** phoenix 7694d 16h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7696d 22h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7697d 13h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1124 Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets.
sfurman 7730d 15h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/
1123 Renumber/rename SPRs to match latest architecture doc sfurman 7731d 22h /or1k/tags/stable_0_2_0_rc3/gdb-5.0/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.