OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1200/] - Rev 1780

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5547d 00h /or1k/trunk/or1200/
1736 See OR1200_MAC_SHIFTBY in or1200_defines.v for explanation of the change. Since now no more 28 bits shift for l.macrc insns however for backward compatbility it is possible to set arbitry number of shifts. lampret 6613d 22h /trunk/or1200/
1583 First Import jcastillo 6785d 12h /trunk/or1200/
1582 Added support for RAMB16 Xilinx4/Spartan3 primitives jcastillo 6785d 12h /trunk/or1200/
1339 revert to the old l.sfxxi behavior phoenix 7064d 12h /trunk/or1200/
1337 du_hwbkpt disabled when debug unit not implemented andreje 7070d 14h /trunk/or1200/
1336 sign/zero extension for l.sfxxi instructions corrected andreje 7070d 14h /trunk/or1200/
1335 flag for l.cmov instruction added andreje 7070d 14h /trunk/or1200/
1334 l.ff1 and l.cmov instructions added andreje 7070d 14h /trunk/or1200/
1293 Non-functional changes. Coding style fixes. lampret 7283d 05h /trunk/or1200/
1292 GPR0 hardwired to zero. lampret 7283d 05h /trunk/or1200/
1291 Changed behavior of the simulation generic models lampret 7283d 05h /trunk/or1200/
1288 By default l.cust5 insns are disabled lampret 7313d 03h /trunk/or1200/
1284 Added some l.cust5 custom instructions as example lampret 7313d 03h /trunk/or1200/
1273 Add support for 512B instruction cache. simont 7344d 12h /trunk/or1200/
1268 Merged branch_qmem into main tree. lampret 7347d 14h /trunk/or1200/
1267 Merged branch_qmem into main tree. lampret 7347d 15h /trunk/or1200/
1228 Exception prefix configuration changed to match branch_qmem configuration. simons 7428d 14h /trunk/or1200/
1211 New wb_biu for iwb interface. lampret 7469d 23h /trunk/or1200/
1208 Added useless signal genpc_stop_refetch. lampret 7469d 23h /trunk/or1200/
1207 Static exception prefix. lampret 7469d 23h /trunk/or1200/
1200 mbist signals updated according to newest convention markom 7518d 15h /trunk/or1200/
1194 correct all the syntax errors dries 7553d 14h /trunk/or1200/
1188 Added support for rams with byte write access. simons 7569d 15h /trunk/or1200/
1186 Added support for rams with byte write access. simons 7570d 14h /trunk/or1200/
1184 Scan signals mess fixed. simons 7577d 07h /trunk/or1200/
1179 BIST interface added for Artisan memory instances. simons 7585d 10h /trunk/or1200/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7651d 20h /trunk/or1200/
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7694d 23h /trunk/or1200/
1155 No functional change. Only added customization for exception vectors. lampret 7698d 01h /trunk/or1200/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.