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Rev	Log message	Author	Age	Path
1201	This commit was manufactured by cvs2svn to create tag 'rel_15'.		7504d 04h	/
1200	mbist signals updated according to newest convention	markom	7504d 04h	/
1199	Daniel Wiklund: Removed multiple entries of debug/Makefile in configure	danwi	7508d 05h	/
1198	make it compile on RH 8,9	phoenix	7533d 19h	/
1197	disabled ram-init of ps2 (old) + changed MAC type into DOS type, so that Xilinx ISE can work with it	dries	7539d 00h	/
1196	removed second debug/Makefile (credits: Daniel Wiklund - danwi@isy.liu.se)	dries	7539d 02h	/
1195	made the project file a little bit more universal	dries	7539d 03h	/
1194	correct all the syntax errors	dries	7539d 03h	/
1193	disabled SRAM_GENERIC and added comment + corrected 'wb_err' into 'wb_err_o'	dries	7539d 03h	/
1192	disabled 'bench_defines.v' during synthesis + added define to specify usage of flash instruction address	dries	7539d 05h	/
1191	disabled 'bench_defines.v' during synthesis + added define to specify usage of flash instruction address	dries	7539d 05h	/
1190	This commit was manufactured by cvs2svn to create tag 'rel_14'.		7555d 03h	/
1189	This commit was manufactured by cvs2svn to create tag 'rel_13'.		7555d 03h	/
1188	Added support for rams with byte write access.	simons	7555d 03h	/
1187	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7556d 02h	/
1186	Added support for rams with byte write access.	simons	7556d 02h	/
1185	This commit was manufactured by cvs2svn to create tag 'rel_11'.		7562d 19h	/
1184	Scan signals mess fixed.	simons	7562d 19h	/
1183	OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0	sfurman	7567d 11h	/
1182	This commit was manufactured by cvs2svn to create tag 'VER_5_3'.		7567d 13h	/

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