URL https://opencores.org/ocsvn/pairing/pairing/trunk

Subversion Repositories pairing

[/] [pairing/] [trunk/] - Rev 21

Rev	Log message	Author	Age	Path
21	Add detailed input data capture condition in the document	homer.xing	4490d 10h	/pairing/trunk/
20	Add a module and a testbench for Xilinx ISE post-route simulation	homer.xing	4491d 12h	/pairing/trunk/
19	Update synthesis result	homer.xing	4492d 05h	/pairing/trunk/
18	add synthesis result	homer.xing	4492d 05h	/pairing/trunk/
17	use logic for $f3m_mux6$	homer.xing	4492d 07h	/pairing/trunk/
16	Add synthesis configuration files	homer.xing	4492d 10h	/pairing/trunk/
15	add document. ha ha ha	homer.xing	4492d 11h	/pairing/trunk/
14	Move constraint file	homer.xing	4492d 12h	/pairing/trunk/
13	Add document and synthesis directories	homer.xing	4492d 12h	/pairing/trunk/
12	Simplify the interface of the core.	homer.xing	4492d 12h	/pairing/trunk/
11	Cheers! as fast as a rocket	homer.xing	4493d 08h	/pairing/trunk/
10	Ho ho, better circuit	homer.xing	4494d 02h	/pairing/trunk/
9	Add constrains file for ISE	homer.xing	4495d 06h	/pairing/trunk/
8	Finished Tate Pairing. Ha ha ha	homer.xing	4495d 07h	/pairing/trunk/
7	Finish inversion @ f33m	homer.xing	4503d 12h	/pairing/trunk/
6	add testbench for $f33m$.	homer.xing	4504d 11h	/pairing/trunk/
5	rename director : verilog/ -> rtl/	homer.xing	4504d 11h	/pairing/trunk/
4	add testbench	homer.xing	4505d 09h	/pairing/trunk/
3	finish Duursma Lee algorithm. doing f33m module	homer.xing	4505d 09h	/pairing/trunk/
2	upload code for Duursma-Lee algorithm. I am still developing them.	homer.xing	4506d 09h	/pairing/trunk/