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[/] - Rev 33

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Rev Log message Author Age Path
13 Add document and synthesis directories homer.xing 4486d 05h /
12 Simplify the interface of the core. homer.xing 4486d 06h /
11 Cheers! as fast as a rocket homer.xing 4487d 01h /
10 Ho ho, better circuit homer.xing 4487d 20h /
9 Add constrains file for ISE homer.xing 4488d 23h /
8 Finished Tate Pairing. Ha ha ha homer.xing 4489d 00h /
7 Finish inversion @ f33m homer.xing 4497d 05h /
6 add testbench for $f33m$. homer.xing 4498d 04h /
5 rename director : verilog/ -> rtl/ homer.xing 4498d 05h /
4 add testbench homer.xing 4499d 03h /

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