OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_4/] [bench/] - Rev 154

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
154 New directory structure. root 5539d 17h /pci/tags/rel_4/bench/
80 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7773d 09h /pci/tags/rel_4/bench/
73 Bug fixes, testcases added. mihad 7779d 10h /pci/tags/rel_4/bench/
69 Changed BIST signal names etc.. mihad 7871d 13h /pci/tags/rel_4/bench/
66 Changed empty status generation in pciw_fifo_control.v mihad 7878d 13h /pci/tags/rel_4/bench/
64 The testcase I just added in previous revision repaired mihad 7881d 14h /pci/tags/rel_4/bench/
63 Added additional testcase and changed rst name in BIST to trst mihad 7881d 15h /pci/tags/rel_4/bench/
62 Added BIST signals for RAMs. mihad 7884d 08h /pci/tags/rel_4/bench/
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7897d 16h /pci/tags/rel_4/bench/
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7931d 09h /pci/tags/rel_4/bench/
52 Oops, never before noticed that OC header is missing mihad 7931d 16h /pci/tags/rel_4/bench/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7931d 17h /pci/tags/rel_4/bench/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 7940d 15h /pci/tags/rel_4/bench/
44 Added for testing of Configuration Cycles Type 1 mihad 7940d 15h /pci/tags/rel_4/bench/
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 7940d 15h /pci/tags/rel_4/bench/
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8085d 18h /pci/tags/rel_4/bench/
34 Added missing include statements mihad 8100d 16h /pci/tags/rel_4/bench/
33 Added some testcases, removed un-needed fifo signals mihad 8101d 14h /pci/tags/rel_4/bench/
26 Modified testbench and fixed some bugs mihad 8115d 09h /pci/tags/rel_4/bench/
19 *** empty log message *** mihad 8133d 11h /pci/tags/rel_4/bench/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.