URL https://opencores.org/ocsvn/rs232_interface/rs232_interface/trunk

Subversion Repositories rs232_interface

[/] [rs232_interface/] [trunk/] [uart.vhd] - Rev 18

Rev	Log message	Author	Age	Path
18	Added RX state verification for start bit process. Added loop in the parallel interface of TB.	akram.mashni	4322d 00h	/rs232_interface/trunk/uart.vhd
11	Moved debouncer to a new process. Fixed rx_clk_en generation. Fixed start of reception condition on rx FSM.	akram.mashni	4856d 20h	/rs232_interface/trunk/uart.vhd
10	Implemented asynchronous mode and RX clock regeneration. NOT TESTED !!!	akram.mashni	4864d 14h	/rs232_interface/trunk/uart.vhd
7	Implemented PARITY (not tested!).	akram.mashni	4903d 16h	/rs232_interface/trunk/uart.vhd
6	Fixed/improved header. Changed SPACEs to TABs.	akram.mashni	4904d 21h	/rs232_interface/trunk/uart.vhd
5	Added comments to port map.	akram.mashni	4912d 01h	/rs232_interface/trunk/uart.vhd
3	Added main file. Fisrt commit. Tested in the following conditions: - Baud rate: 9600 bps. - Implementation: Xilinx Spartan3e500 (Nexys2 Kit - Digilent) - Main clock 50 MHz	akram.mashni	4912d 03h	/rs232_interface/trunk/uart.vhd