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[/] [s6soc/] - Rev 25

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Rev Log message Author Age Path
25 Converted timer B to be a non-reloadable watchdog timer. dgisselq 2401d 13h /s6soc/
24 Made the ziptimer autoreload feature a parameter (dis)abled option. dgisselq 2401d 13h /s6soc/
23 Fixed a bug which caused every instruction to be loaded/prefetched twice. dgisselq 2401d 13h /s6soc/
22 Initial version of the ZipOS operating system construct(s). dgisselq 2405d 11h /s6soc/
21 Adds two device drivers: one for the SPI display, and another for the pseudo
device that simulates the Real-Time Clock.
dgisselq 2405d 12h /s6soc/
20 This linker description file acknowledges a .fixdata section which can be
used for debug data upon startup. This allows a startup function to write
all registers out, without destroying them or modifying them on the way.
dgisselq 2405d 12h /s6soc/
19 Addition of dumpuart.cpp to dump the UART transactions to a FILE (method of
debugging the board). FLASHDRVR and ZIPLOAD were also updated to handle
loading ELF files where the code is longer than a single block.
dgisselq 2405d 12h /s6soc/
18 Added a picture of the device pinouts to the specification. dgisselq 2405d 12h /s6soc/
17 Modifications necessary to find some bugs, and to load the flash with an ELF
file.
dgisselq 2405d 12h /s6soc/
16 Bug fix. This release fixes several bugs associated with transitioning from
user mode to supervisor mode while running from flash memory. This also
rewires TIMER-B into a watch-dog timer, and adjusts the LED's to be an
indicator of interrupts and whether or not the CPU has stalled or not as well.
dgisselq 2405d 12h /s6soc/
15 Adds a new program and a new device: doorbell2 and the PmodCLS display. This
also includes a real-time clock simulator--since we couldn't fit it on the
board.
dgisselq 2411d 05h /s6soc/
14 Modified the loader so that it will load even if there are RAM variables
in the load, just as long as they aren't anything but zero. (The startup code,
however, doesn't clear memory to match--so be sure to initialize all variables.)
dgisselq 2411d 05h /s6soc/
13 Fixed a nasty parameter problem between toplevel and txuart. The UART
transmitter now both works (again), and properly generates the required
interrupts. This also finishes the fixes to the alternate toplevel file,
alttop.v, that should've been fixed in the last release.
dgisselq 2411d 05h /s6soc/
12 The UART and PWM audio now work. This includes the changes to make that
happen, as well as the source code for some UART and PWM demo programs.
dgisselq 2412d 03h /s6soc/
11 Runs on hardware now! Added proper pinouts, pipelined wishbone command
interface sufficient for loading the flash, a loader to load the flash,
and verified that they work.
dgisselq 2413d 01h /s6soc/
10 Added the capability to run ELF files natively, fully processing the ELF format. dgisselq 2413d 01h /s6soc/
9 Added pinout diagrams, based upon a (hopefully) final UCF file. dgisselq 2413d 01h /s6soc/
8 First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals.
dgisselq 2418d 02h /s6soc/
7 Created/added an initial specification. Updated/corrected several copywrite
notices.
dgisselq 2418d 16h /s6soc/
6 Initial UCF modifications. Pin layout still isn't complete, but I'm starting
to work it.
dgisselq 2439d 11h /s6soc/

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