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[/] [s6soc/] - Rev 36

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Rev	Log message	Author	Age	Path
16	Bug fix. This release fixes several bugs associated with transitioning from user mode to supervisor mode while running from flash memory. This also rewires TIMER-B into a watch-dog timer, and adjusts the LED's to be an indicator of interrupts and whether or not the CPU has stalled or not as well.	dgisselq	2933d 07h	/s6soc
15	Adds a new program and a new device: doorbell2 and the PmodCLS display. This also includes a real-time clock simulator--since we couldn't fit it on the board.	dgisselq	2939d 00h	/s6soc
14	Modified the loader so that it will load even if there are RAM variables in the load, just as long as they aren't anything but zero. (The startup code, however, doesn't clear memory to match--so be sure to initialize all variables.)	dgisselq	2939d 00h	/s6soc
13	Fixed a nasty parameter problem between toplevel and txuart. The UART transmitter now both works (again), and properly generates the required interrupts. This also finishes the fixes to the alternate toplevel file, alttop.v, that should've been fixed in the last release.	dgisselq	2939d 00h	/s6soc
12	The UART and PWM audio now work. This includes the changes to make that happen, as well as the source code for some UART and PWM demo programs.	dgisselq	2939d 22h	/s6soc
11	Runs on hardware now! Added proper pinouts, pipelined wishbone command interface sufficient for loading the flash, a loader to load the flash, and verified that they work.	dgisselq	2940d 20h	/s6soc
10	Added the capability to run ELF files natively, fully processing the ELF format.	dgisselq	2940d 20h	/s6soc
9	Added pinout diagrams, based upon a (hopefully) final UCF file.	dgisselq	2940d 20h	/s6soc
8	First pseudo-running version. The alternate configuration (not the main one) has been initially tested. wbregs works for reading/writing registers, so it is now possible to test the peripherals.	dgisselq	2945d 21h	/s6soc
7	Created/added an initial specification. Updated/corrected several copywrite notices.	dgisselq	2946d 11h	/s6soc

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