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[/] [s6soc/] - Rev 9

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9 Added pinout diagrams, based upon a (hopefully) final UCF file. dgisselq 2919d 11h /s6soc/
8 First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals.
dgisselq 2924d 11h /s6soc/
7 Created/added an initial specification. Updated/corrected several copywrite
notices.
dgisselq 2925d 02h /s6soc/
6 Initial UCF modifications. Pin layout still isn't complete, but I'm starting
to work it.
dgisselq 2945d 21h /s6soc/
5 These two are my first attempt(s) at a secondary project file, one that can
run as an alternate to the main file but that gives more access to the hardware,
such as programming access to the flash.
dgisselq 2945d 21h /s6soc/
4 Lots of updates, as part of actually making this work on hardware. Not there
yet, so this is still pre-alpha.
dgisselq 2945d 21h /s6soc/
3 Updated date. dgisselq 2945d 21h /s6soc/
2 The initial check in--all the files that will make this SoC work. dgisselq 2956d 16h /s6soc/
1 The project and the structure was created root 2956d 17h /s6soc/

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