URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

[/] - Rev 28

Rev	Log message	Author	Age	Path
8	First pseudo-running version. The alternate configuration (not the main one) has been initially tested. wbregs works for reading/writing registers, so it is now possible to test the peripherals.	dgisselq	2938d 13h	/
7	Created/added an initial specification. Updated/corrected several copywrite notices.	dgisselq	2939d 04h	/
6	Initial UCF modifications. Pin layout still isn't complete, but I'm starting to work it.	dgisselq	2959d 23h	/
5	These two are my first attempt(s) at a secondary project file, one that can run as an alternate to the main file but that gives more access to the hardware, such as programming access to the flash.	dgisselq	2959d 23h	/
4	Lots of updates, as part of actually making this work on hardware. Not there yet, so this is still pre-alpha.	dgisselq	2959d 23h	/
3	Updated date.	dgisselq	2959d 23h	/
2	The initial check in--all the files that will make this SoC work.	dgisselq	2970d 18h	/
1	The project and the structure was created	root	2970d 19h	/