URL https://opencores.org/ocsvn/sdcard_mass_storage_controller/sdcard_mass_storage_controller/trunk

Subversion Repositories sdcard_mass_storage_controller

[/] - Rev 137

Rev	Log message	Author	Age	Path
137	Ram image for the sd-card, contating part of a FAT16 filesystem.	tac2	4956d 01h	/
136	Updated. 1. SD-model uppdated. 2. Data transaction completion only when BD que is empty 3. Card detect with debounce added to Normal_isr register bit, [1][2] 4. Reset logic change, should be synthesizable in altera and xilinx devices, without need of modifications	tac2	4956d 01h	/
135	Uppdated Testbench	tac2	4956d 02h	/
134	Uppdate of project, filenames no mix of uppercase and lowercase. No subfolder for the fifo.	tac2	4956d 03h	/
133	Major uppdate of project, rename old files and restructure the folders	tac2	4956d 03h	/
132		tac2	5146d 00h	/
131		tac2	5146d 00h	/
130		tac2	5146d 00h	/
129		tac2	5146d 01h	/
128		tac2	5146d 03h	/
127		tac2	5146d 03h	/
126		tac2	5146d 15h	/
125	New Testcase added	tac2	5413d 09h	/
124		tac2	5413d 21h	/
123		tac2	5413d 23h	/
122	Added big endian to data_host. Serial_host now reset word_cnt	tac2	5414d 00h	/
121	Big endianes and Lite endian switched	tac2	5414d 00h	/
120	RAM_WIDTH_32 Support added	tac2	5414d 03h	/
119	Word select fixed	tac2	5422d 06h	/
118	interupt generation corrected with a Or reduction	tac2	5422d 16h	/
117		tac2	5426d 00h	/
116		tac2	5427d 03h	/
115		tac2	5427d 04h	/
114		tac2	5466d 01h	/
113		tac2	5482d 01h	/
112		tac2	5482d 04h	/
111	Uppdate to follow design 0.2 Added license information header	tac2	5482d 15h	/
110		tac2	5482d 15h	/
109		tac2	5482d 15h	/
108	Updated to Design document v.02	tac2	5482d 16h	/