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[/] [sdhc-sc-core/] - Rev 188

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Rev Log message Author Age Path
188 Declared all targets phony to force building. rkastl 4859d 23h /sdhc-sc-core/
187 Unit makefiles modified to reflect new location of Makefile.rules. rkastl 4859d 23h /sdhc-sc-core/
186 Makefile adapted to new paths. rkastl 4859d 23h /sdhc-sc-core/
185 Restructuring as source repository: Moved sources out of src subdirectory. rkastl 4859d 23h /sdhc-sc-core/
184 Removed WbSlave shell (refs #69)
Moved verification sources to grpSdVerification (fixes #70)		 rkastl 4862d 17h /sdhc-sc-core/
183 Removed unneeded wrapper (refs #69)
Sector count increased in TestWbMaster (refs #78)		 rkastl 4862d 17h /sdhc-sc-core/
182 Fixes #60.

Synchronization logic moved to its own unit.		 rkastl 4862d 17h /sdhc-sc-core/
181 Refs #60.

Fix synthesis with seperate WbClkDomain.		 rkastl 4862d 17h /sdhc-sc-core/
180 Moved WbClkDomain to its own unit.
Refs #60.		 rkastl 4862d 17h /sdhc-sc-core/
179 Fixing build:
Added library generation to Makefile.		 rkastl 4862d 17h /sdhc-sc-core/
178 Fixed regression:
Testbenches did not support synchronous reset.		 rkastl 4862d 17h /sdhc-sc-core/
177 Split SdTop into SdClkDomain and SdTop. Refs #60. rkastl 4862d 17h /sdhc-sc-core/
176 Thesis:
Conclusion

Fixes #53,#61.		 rkastl 4862d 17h /sdhc-sc-core/
175 Thesis:

Fixes #45.		 rkastl 4862d 17h /sdhc-sc-core/
174 Thesis:
System integration

Fixes #51.		 rkastl 4862d 17h /sdhc-sc-core/
173 Thesis:
Started with SdController description.

Refs #38.		 rkastl 4862d 17h /sdhc-sc-core/
172 Thesis:
wbclockdomain: refactored and finished.

Fixes #39.		 rkastl 4862d 17h /sdhc-sc-core/
171 Worked on wishbone part of thesis.

Refs #37.
Refs #39.		 rkastl 4862d 17h /sdhc-sc-core/
170 License rewritten to BSD rkastl 4862d 17h /sdhc-sc-core/
169 +sdc file for timing analysis rkastl 4862d 17h /sdhc-sc-core/

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