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Rev Log message Author Age Path
26 invalid log files are removed dinesha 4520d 16h /
25 tb.sv is renamed as tb_top dinesha 4520d 16h /
24 Clean Up dinesha 4520d 16h /
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4521d 22h /
22 Pad sdram clock added dinesha 4521d 22h /
21 Clean up dinesha 4521d 22h /
20 8 Bit SDARM support is added dinesha 4523d 16h /
19 8 Bit SDRAM Support added dinesha 4523d 16h /
18 8 Bit SDRAM Support is added dinesha 4523d 16h /
17 micron 8 bit memory models are added into svn dinesha 4523d 17h /
16 8 Bit SDRAM Support is added dinesha 4523d 17h /
15 Port cleanup dinesha 4526d 17h /
14 Unnecessary device config are removed dinesha 4526d 17h /
13 column bit are made progrmmable dinesha 4526d 18h /
12 Column Bits are made programmable dinesha 4526d 18h /
11 SDRAM Specification document added into SVN dinesha 4529d 19h /
10 Waveform files are added into SVN dinesha 4529d 19h /
9 SDR Bus width parameter passing issue across the models are fixed dinesha 4530d 18h /
8 test bench files are added into SVN dinesha 4530d 18h /
7 SDRAM Memory Models are added into SVN dinesha 4530d 18h /

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