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[/] [sdr_ctrl/] [trunk/] [rtl/] - Rev 31

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Rev Log message Author Age Path
31 Integrated SDRAM controller with wishbone interface is added into SVN dinesha 4527d 08h /sdr_ctrl/trunk/rtl/
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4529d 12h /sdr_ctrl/trunk/rtl/
16 8 Bit SDRAM Support is added dinesha 4531d 07h /sdr_ctrl/trunk/rtl/
15 Port cleanup dinesha 4534d 08h /sdr_ctrl/trunk/rtl/
13 column bit are made progrmmable dinesha 4534d 08h /sdr_ctrl/trunk/rtl/
9 SDR Bus width parameter passing issue across the models are fixed dinesha 4538d 09h /sdr_ctrl/trunk/rtl/
4 Sdram controller RTL bug fixes done for 16bit SDR Mode dinesha 4539d 06h /sdr_ctrl/trunk/rtl/
3 SDRAM controller core files are checked in dinesha 4545d 16h /sdr_ctrl/trunk/rtl/
2 dinesha 4548d 08h /sdr_ctrl/trunk/rtl/

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