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[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] - Rev 23

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Rev Log message Author Age Path
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4498d 00h /sdr_ctrl/trunk/rtl/core/
16 8 Bit SDRAM Support is added dinesha 4499d 19h /sdr_ctrl/trunk/rtl/core/
15 Port cleanup dinesha 4502d 20h /sdr_ctrl/trunk/rtl/core/
13 column bit are made progrmmable dinesha 4502d 20h /sdr_ctrl/trunk/rtl/core/
9 SDR Bus width parameter passing issue across the models are fixed dinesha 4506d 21h /sdr_ctrl/trunk/rtl/core/
4 Sdram controller RTL bug fixes done for 16bit SDR Mode dinesha 4507d 18h /sdr_ctrl/trunk/rtl/core/
3 SDRAM controller core files are checked in dinesha 4514d 05h /sdr_ctrl/trunk/rtl/core/

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