OpenCores
URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_bs_convert.v] - Rev 44

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
44 SDRAM data path logic is modified to support 4 command line pipe line of different bank dinesha 3960d 03h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
37 SDRAM dq and sdram pad clock are termindated inside the top rtl files dinesha 3962d 06h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
31 Integrated SDRAM controller with wishbone interface is added into SVN dinesha 3964d 22h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
16 8 Bit SDRAM Support is added dinesha 3968d 21h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
4 Sdram controller RTL bug fixes done for 16bit SDR Mode dinesha 3976d 20h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
3 SDRAM controller core files are checked in dinesha 3983d 06h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.