OpenCores
URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [rtl/] [wb2sdrc/] - Rev 42

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
42 Bug fix in read access is fixed dinesha 4553d 09h /sdr_ctrl/trunk/rtl/wb2sdrc/
40 Application layer Fifo full conditional are register now to synth timing fixes dinesha 4554d 04h /sdr_ctrl/trunk/rtl/wb2sdrc/
37 SDRAM dq and sdram pad clock are termindated inside the top rtl files dinesha 4555d 11h /sdr_ctrl/trunk/rtl/wb2sdrc/
33 clean up dinesha 4556d 04h /sdr_ctrl/trunk/rtl/wb2sdrc/
31 Integrated SDRAM controller with wishbone interface is added into SVN dinesha 4558d 03h /sdr_ctrl/trunk/rtl/wb2sdrc/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.