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URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

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[/] [sdr_ctrl/] [trunk/] [verif/] - Rev 45

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Rev Log message Author Age Path
17 micron 8 bit memory models are added into svn dinesha 4497d 18h /sdr_ctrl/trunk/verif/
14 Unnecessary device config are removed dinesha 4500d 19h /sdr_ctrl/trunk/verif/
12 Column Bits are made programmable dinesha 4500d 20h /sdr_ctrl/trunk/verif/
10 Waveform files are added into SVN dinesha 4503d 20h /sdr_ctrl/trunk/verif/
8 test bench files are added into SVN dinesha 4504d 20h /sdr_ctrl/trunk/verif/
7 SDRAM Memory Models are added into SVN dinesha 4504d 20h /sdr_ctrl/trunk/verif/
6 Golden Log files are added into SVN dinesha 4504d 20h /sdr_ctrl/trunk/verif/
5 Run files are updated into SVN dinesha 4504d 20h /sdr_ctrl/trunk/verif/
2 dinesha 4514d 20h /sdr_ctrl/trunk/verif/

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